16 years in the making, Everspin just unveiled the first spin-torque MRAM, a contender for a new generation of memory chip technology.

Our original investment thesis for novel memory technologies (like Coatue/AMD, Nantero and Everspin) was a sense that Moore’s Law would begin to bifurcate, where technical advances in memory precede logic by several years. In the next few years, radical advances in memory density and performance will be needed to relieve the performance bottleneck in corporate computing.

These new technologies are non-volatile rad-hard memories that should be faster, smaller, cooler, cheaper and more reliable than the SRAM and DRAM kludge.

Background: Memory advances are becoming increasingly important to further advances in computing and computation. The mention of Moore’s Law conjures up images of speedy Intel microprocessors. Logic chips used to be mostly made of logic gates, but today’s microprocessors, network processors, FPGAs, DSPs and other “systems on a chip” are mostly memory. But they are still built in fabs that were optimized for logic, not memory.

The IC market can be broadly segmented into memory and logic chips. The ITRS estimates that 90% of all logic chip area is actually memory. Coupled with the standalone memory business, we are entering an era for complex chips where almost all transistors manufactured are memory, not logic.

Back in 2005 I was truck by the details of Intel’s Montecito processor. They had to add more error-correction-code memory bits (now over 2 bits per byte) to deal with the growing problem of soft errors (alpha particles from radioactive decay and cosmic rays from space flipping a bit as the transistors get very small). According to Intel, of the 1.72 billion transistors on the chip, 1.66 billion are memory and 0.06 billion are logic.

Why the trend to memory-saturated designs? Intel’s primary design enhancement from the prior Itanium processor was to “relieve the memory bottleneck.” For enterprise workloads, Itanium executes 15% of the time and stalls 85% of the time waiting for main memory. When the processor lacks the needed data in the on-chip cache, it has to take a long time penalty to access the off-chip DRAM. Power and cost are also improved to the extent that more can be integrated on chip.

Who should care about this? A large and growing set of industries depends on continued exponential cost declines in computational power and storage density. Moore’s Law drives electronics, communications and computers and has become a primary driver in drug discovery and bioinformatics, medical imaging and diagnostics. Over time, the lab sciences become information sciences, and then the speed of iterative simulations accelerates the pace of progress.

Intel is right: “Compute must evolve”

More on the big picture version of Moore’s Law.

News on Spin-Torque MRAM: VentureBeat and Electronic Design.

P.S. we have a conference room at work dedicated to MRAM 1.0, aka core memory.

9 responses to “Spin-Torque MRAM”

  1. P.S. in a very strange twist of fate, I first walked through what is now the Everspin fab when I was 6 years old!

    And that technology attractor is the reason I am a U.S. citizen, born a few months after my parents moved to Arizona:

    Déjà vu

  2. Is there anything that can be done to shield these high density chips from those alpha particles that cause so much trouble? It seems the smaller we make chips the more prone they are to fail with EM interference. Due to this trend, many amateur radio enthusiasts are embracing fully vacuum tube based radios in their ham shack to have just in case of EMP bursts being weaponized and used against us.

  3. [http://www.flickr.com/photos/jurvetson] That’s a good story.

  4. [http://www.flickr.com/photos/kt] – absolutely! Better yet, all of the three technologies I mentioned above as contenders for the next generation are inherently immune to soft errors.

    The number of error-correcting bits per byte of SRAM keeps growing, a waste of space and speed. SRAM needs many transistors to store one bit of data.

    We go through unnatural acts with CMOS silicon to get an inherently analog and leaky medium to approximate the digital and non-volatile abstraction that we presume in our software design methodology.

  5. reminds me of a story (not sure if true) that cd player companies were using ‘audio ram’ when they had enough buffering to read into ram and then clock out again, for playback. bump protection modes (ie, highly buffered playback) used the ram and people (10 yrs ago, maybe 15) were claiming that the sound was not as good. the theory was that bad ram that could not be sold for computers *could* be used for non-critical things, like, well, audio players 😉 a few broken bits won’t crash your player like it would an executable file.

    it sounds plausible and back then when ram was horribly expensive, being able to use ‘mostly ok’ chips does make some kind of sense.

  6. They were used in AT&T digital answering machines. Rejects for data storage.

  7. wonderful!!
    great to be able to see the timeline so clearly 🙂

  8. The alpha particles you describe don’t come from space, since alphas are easily stopped by a few centimeters of air. Instead, these particles from alpha decay of contaminants within *the chip packaging itself* (early ceramic chip packages were especially susceptible to this). Since the raw material for ceramics is extracted from the ground, it can be contaminated with naturally occurring U, Th, Ra, Sm, etc.
    Plastic packaging can have the same problem of contamination, but to a much lesser extent. I’m not sure what exactly causes contamination of the resin for plastic packages…

    Supposedly the most common cause of soft errors these days comes from cosmic rays. When cosmic rays (predominantly free high energy protons) enter the atmosphere, they interact with it to create secondary particles that actually reach the surface of the planet (some particles also reach quite a bit of distance below the ground). These secondary particles then proceed to flip bits.
    This problem is pretty pronounced in planes and spacecraft. It’s also geographically dependent, so there will probably be more soft errors in places like Colorado (elevation) or Utah (natural uranium deposits) than, say, Alabama.
    Certain chip materials, such as BPSG (insulator glass), are more susceptible to cosmic rays. BPSG contains Boron-10, which has a high neutron cross-section (~3800 barns) and is more likely to be activated by neutrons and become radioactive. Boron-11 (aka depleted boron) is sometimes used when high reliability is required, as it has a very small neutron cross-section (~0.05 barns) and thus is much less likely to react to neutrons.

    Lastly, soft errors are a problem in medical imaging and cancer radiotherapy. Scattered X-rays can produce soft errors, and neutron activation products caused by particle beams can cause nearby materials to become radioactive and disrupt ICs much like cosmic rays do. Sometimes parts of the IC itself become radioactive, which causes persistent problems.

  9. Thanks. Right you are; I blurred the two common causes. So, I just corrected the caption. But it was indirectly correct, the cosmic rays from space generate alpha particles locally that cause the soft errors:

    "IBM estimated in 1996 that one error per month per 256 MiB of ram was expected for a desktop computer. This flux of energetic neutrons is typically referred to as "cosmic rays" in the soft error literature. Neutrons are uncharged and cannot disturb a circuit on their own, but undergo neutron capture by the nucleus of an atom in a chip. This process may result in the production of charged secondaries, such as alpha particles and oxygen nuclei, which can then cause soft errors." (wikipedia)

    And there is more there for the curious. For example, we can protect against cosmic rays by putting our computers in caves, and

    "The average rate of cosmic-ray soft errors is inversely proportional to sunspot activity. The increase in the solar flux during an active sun period has the effect of reshaping the Earth’s magnetic field providing some additional shielding against higher energy cosmic rays, resulting in a decrease in the number of particles creating showers. "

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