D-Wave Orion

Today’s MIT Tech Review opening seems like a good prompt to tell the story of the D-Wave Orion that adorns our office:

“Inside a blocky building in a Vancouver suburb is a place chilled colder than anywhere in the natural universe. Inside that is a computer processor that Amazon founder Jeff Bezos and the CIA’s investment arm, In-Q-Tel, believe can tap the quirks of quantum mechanics to unleash more computing power than any conventional computer chip.

If the bet works out, some of the world’s thorniest computing problems, such as the hunt for new drugs or efforts to build artificial intelligence, would become dramatically less challenging.

D-Wave’s supercooled processor is designed to handle what software engineers call “optimization” problems, the core of conundrums such as figuring out the most efficient delivery route, or how the atoms in a protein will move around when it meets a drug compound. “Virtually everything has to do with optimization, and it’s the bedrock of machine learning, which underlies virtually all the wealth creation on the Internet,” says Geordie Rose, D-Wave’s founder and chief technology officer.”

So with that preamble, let me share the story of this artifact (and detailed photos below), with huge thanks to Murray, our historical scribe and Research Engineer at D-Wave:

“The ORION-IO project was a lot of fun and all the more remarkable in the context of the quantum computing processor, fabrication, and software development that were taking place with it. In 2007 it became somewhat emblematic of the complexity and teamwork that were characteristic of the whole quantum computing system.

The technical specifications and contextual history are more rich than can be captured in a short summary, but I’ve tried to provide some design notes that tell elements of the story.

ORION-IO Design Notes:

[Component Elements]

i.Wiring from room temperature to 20mK
ii.The Lumped-Element-Filter (LEF) bank in a plate stack.
iii.The Copper-Powder-Filter (CPF) bank in a honeycomb bar
iv.The Chip Packaging and Pedestal Mount

[Time]

The ORION-IO project kicked-off with defining requirements in May 2006. The first 16 qubit chip was installed and cooled in an ORION-IO assembly on Nov 21st, 6.5 months later. Before the end of 2006 Mike Simmonds, then VP of Quantum Design (a cryogenics equipment manufacturer), visited and reviewed the design. He proposed a 1-year project to do an iteration on the system, not knowing that we had built the original in almost half that time.

[Temperature]

The entire ORION-IO system operates at ~20mK (0.020K) with the quantum processor (save for the top section of wiring.) That’s more than 100X colder than interstellar space — 2.725K for the cosmic microwave background radiation. There are no known processes in the Universe that can achieve temperatures that cold. So unless there is other intelligent life somewhere in space, this assembly was the coldest place in the Universe during it’s working life.

[Space]

The ORION-IO was tightly space constrained. The assembly had a 2mm vacuum gap around the LEF plates and a 5mm vacuum gap off of its end.

[Resistance]

The quantum processors that mounted in the ORION-IO system had all superconducting circuitry. To support quantum computation at 20mK all of the wiring in the ORION-IO assembly had to be superconducting as well. This included printed circuit boards, wire bond pads, solder contacts, connectors, wires, and filters.

[Filtering]

The filters in the ORION-IO are low-pass filters with a 3MHz cut-off frequency. The noise above the signal bandwidth is severely attenuated for a cryogenic environment. The strongest attenuation begins at 6GHz when the noise power is attenuated 1 Billion Billion times (10^-18). There are no resistive losses on the signal path.

[Chip Packaging]

The aluminum plates around the chip serve as a superconducting shield that freeze the remnant magnetic field in place around the processor. However superconducting aluminum is an extremely poor thermal conductor. To reduce the cool-down time from days to hours, the printed circuit board (PCB) is bolted to a copper under-plate with 12 gold-plated copper screws. The PCB itself has gold and tin plating on the surface metal layer as well as superconducting traces on its inner wire layer. At each edge are non-magnetic, superconducting contact pins that must mate with any ORION-IO filtering assembly. One additional concern is that each assembly must manage multiple 300K temperature cycles. This combination of constraints made the chip packaging the most challenging section to design.

[Vacuum Annealing]

Most of the mechanical parts are made out of high-purity Oxygen-free copper. The heaviest copper parts were vacuum annealed to remove Hydrogen that gets captured in the metal during Oxygen removal (Hydrogen goes through a state transition at low-Temperatures that slows cool-down). The annealing creates large domain crystals in the metal that you can see on the surface under the gold plating.

[Dry Mechanical Joints]

There are 12 plate-to-plate joints in the ORION-IO assembly between the fridge and the chip packaging. The gold plating prevents oxidation on the surface of the copper that would reduce thermal conductivity at these interfaces. All of these mechanical joints are dry contacts between mirror-polished plates. These joints were the first of their kind and went against standard practice amongst low-temperature designers. Ultimately the final performance proved the design.

[State of the Art]

Cooling chips to 20mK is one thing. Cooling the electrons in the superconducting circuitry is another thing altogether. To characterize the D-Wave quantum processors the electron temperature had to be measured in the circuitry. Temperatures as low as 17mK were observed. By comparison, a research team at MIT was reporting electron temperatures of 80-90mK in their superconducting quantum circuits (results quoted are circa 2007).

[Mask Generations Tested]

The ORION-IO was one of the longer lasting IO designs at D-Wave. It was used in tests of all of the following mask generations over 5 years:
•Vesuvius
•Shasta
•Rainier
•Quaoar
•Pushkin
•Oberon
•Nacimiento
•Metis
•Leda
•Kalyke
•Iapetus
•Hyperion
•Ganymede
•Phobos II
•Phobos
•Europa II

[Notable Results]

During the course of quantum processor development on ORION-IO systems, some of the more notable results obtained include the following:

• 16-qubit QC demo in Mountain View, CA and Vancouver; Feb 2007

• 28-qubit Demo at HPC conference; Nov 2007

• Geometrical dependence of the low-frequency noise in superconducting flux qubits; Phys Rev B.; T. Lanting et al.

• 52-qubit Google Demo, Nov 2009

• A lot of photography that became marketing material, and some of the artwork lining the D-Wave hallways [and DFJ conference rooms]

[Art and Design Concept]

The design of the ORION-IO was largely determined by the tight space constraints — 110 filtered lines plus a quantum chip in roughly the space of a bread pan. The filtering attenuation was very large at frequencies where electromagnetic noise can pass through tiny apertures; so the output of the filters had to be carefully isolated from their input. This is where the dry, mirror-polished joints in the body served double-duty for high thermal conductivity and excellent electrical isolation.

The cylindrical concept was to keep the noisy space outside the cylinder, and the clean signals at the center. With each plate in the stack enclosing a narrow channel for all of the filters in the plate beneath.
There was little freedom for artistic choices although the one notable exception was the colour of the printed circuit boards, each chosen to complement the colour of the metal surfaces around it.

[No Room For Error]

The design for ORION was based on scaling the 23-line ARIES-IO system. The perceived risk of failed lines was substantial, so multiple redundancies were designed into the stages of the system to allow for possible failures (the system was designed as a single module, once constructed). The maximum line yield for an ORION-IO system was 128 lines. The first ORION-IO came online with 126/128 line yield. After final assembly the system passed all operational tests on its first cool down. Over their lifetime the highest yield of the four systems built was 128, the lowest was 122.